Speaker
Description
While SiPM use is increasing, it is well accepted that the one-to-one coupling of SPAD to a CMOS quenching circuit is the best way to leverage their single photon counting and precise timing capabilities. We develop photon-to-digital converters (PDC) that expand these capabilities with embedded time-to-digital conversion and advanced signal processing. The SPAD architecture, 3D integration scheme, and CMOS readout circuit layout were engineered simultaneously for implementation in the Teledyne DALSA foundry. We designed the SPAD structure to optimize timing resolution (with 10 ps RMS as a goal) and photon detection efficiency between 350 nm and 450 nm, a range favored for wavelength shifters and scintillators. We also work at increasing detection efficiency in the VUV. While present work focuses on 180 nm CMOS readout for astroparticle physics experiments, we will also discuss the path for integration with 65 nm CMOS. I will review the progress of the SPAD array development, production and performance including our work toward photodection modules suitable for integration in large scale experiments.
